About VLSI EXPERT®
"This isn't a business.
It's a gap we decided to fix."
Puneet Mittal · Founder & CEO
Concept Chip Product  ·  AI for IC  ·  IC for AI
17
Years
Operating
5,000+
Engineers
Trained
750+
Placed in
Industry
60+
Hiring
Companies
22+
MoUs
Signed
15+
Countries
Reached
Why We Exist

We didn't see a business opportunity.
We saw a gap.

It is easy to say "colleges lack industry tools." That is too generic, and not entirely true. The real picture is layered. Tier-1 colleges often build strong fundamentals but offer little real industry exposure — students graduate knowing the theory of CMOS having never opened an EDA tool. Tier-2 and Tier-3 colleges frequently lack both, leaving genuinely capable students with no path into the industry at all — not because they lack talent, but because nobody ever showed them what the industry actually expects.

Mentorship, across every tier, is almost non-existent. A student stuck on a concept at midnight has nowhere to turn — not a senior, not a professor, not a forum that actually answers.

That is the gap VLSI EXPERT was built to close. Not a curriculum gap. A guidance gap. The technical training came later. What came first was simply being the person who picked up the phone.

But the student gap was only the first one we found. Once you work across the full arc — from concept through silicon to product — you discover gaps at every stage, and for every kind of organisation. Each one we filled became a part of what we now do.

Students
The GapFundamentals without exposure, or neither. No mentorship. No idea what industry expects.
We Fill ItLive instructor-led training on the production Synopsys toolchain, real projects, placement support that continues after placement.
Academia
The GapLabs without industry tools. Curricula years behind practice. Faculty with no route to current EDA flows.
We Fill ItLab and infrastructure development, curriculum design, faculty development programmes, MoU-backed joint certifications.
Train the Trainer
The GapInstitutions want to teach VLSI but have nobody qualified to teach it — and no way to build that capability.
We Fill ItFDP and train-the-trainer programmes that build lasting internal capability rather than one-off workshops.
Industry
The GapHiring is constrained by talent supply, not headcount. Every fresh hire needs 3–6 months of ramp-up.
We Fill ItPre-trained engineers ready on day one, custom training for existing hires, and five talent engagement models.
Consultancy
The GapOrganisations want to run silicon programmes or set up design capability but have no in-house expertise to start.
We Fill ItTapeout consultancy, PDK and foundry enablement, design services, ODC setup and EDA methodology advisory.
How Our Scope Evolved

We started at concept.
Then we reached silicon. Now we're building products.

For most of our history the mission was concept to silicon — take an engineer from theory to a working chip design. Then we actually taped out silicon, and the Innatera partnership put real neuromorphic hardware in our hands. The moment you hold a chip, the question changes from "can we design it?" to "what gets built on top of it?" That extended the arc.

Stage 01 · Where we began
Concept
Fundamentals, architecture, RTL, verification methodology. Turning a theoretical understanding of CMOS into the ability to write, simulate and verify a real design.
RTL Design Verification Architecture Methodology
Stage 02 · Where we proved it
Chip
Synthesis, physical design, timing signoff, PDK, tapeout, fabrication. Not a simulation of the flow — a GDSII submitted to a foundry and silicon that came back working.
Physical Design STA & Signoff PDK GF180nm Tapeout
Stage 03 · Where we are going
Product
Silicon is a means, not an end. With real chips in hand — our own and Innatera's neuromorphic processors — the work becomes systems, boards, SDKs and the products that ship on top of them.
Edge AI Systems EVK & Boards IP Cores Platforms
Why this matters
Almost every organisation in this space picks one stage. Universities stop at concept. Training institutes stop before silicon. Design services companies start after the engineer is already trained. VLSI EXPERT works across all three — which is why we can train an engineer, tape out their design, and then build a product on that silicon.
What Drives Us

Vision, mission and the goal we measure against.

Three statements that decide what we build, what we refuse to build, and how we judge whether a year was worth it.

🔭
Vision
An India that designs its own silicon — built by engineers from anywhere, not just the top ten colleges.
Talent is distributed evenly. Opportunity is not. We want a country where an engineer from a Tier-3 college in Ranchi can sit in the same design review as an IIT graduate — and hold their own. Nine such students taping out real silicon on a production foundry process was the first proof this is achievable, not aspirational.
🎯
Mission
Close the gap at every stage from concept to chip to product — for whoever is standing in it.
A student without tool access. A college without a lab. An institution without qualified faculty. A company that cannot hire fast enough. An organisation that wants to run a silicon programme and has nowhere to start. Each is a different gap on the same arc — and we build whatever is needed to close it, whether that is a training programme, a lab, a design team or a tapeout.
🏁
Goal
Be the organisation India turns to for both sides of AI and silicon.
India is committing billions to domestic fabrication, and AI is reshaping how chips get designed and what they are designed for. Our goal sits at that intersection — engineers who use AI to build chips, and silicon capability for chips that run AI. Talent, design services, silicon programmes and products, all on the same arc.
The Bigger Frame

AI for IC.
IC for AI.

Two words apart, two completely different disciplines — and VLSI EXPERT works on both sides. One uses artificial intelligence to build better chips, faster. The other builds the chips that artificial intelligence runs on. Most organisations do one. The interesting work is at the intersection.

AI → IC  ·  Using AI to design chips
AI for IC
Artificial intelligence has become an engineering tool inside the design flow — reading specifications, generating testbenches, interpreting waveforms, closing coverage. The engineers who use it well are already faster than the ones who don't. We teach it as a working discipline, not a buzzword.
  • AI Engineering Lab in every module — spec analysis, timing diagram generation, FSM creation, assertion writing
  • AI-assisted debugging — root cause analysis, waveform interpretation, prompt-based regression triage
  • Coverage & verification acceleration — scenario generation and closure strategy
  • Engineering productivity — students build a personal prompt library they carry into industry
Protocol Verification with AI →
IC → AI  ·  Building the chips AI runs on
IC for AI
Every AI model eventually has to run on silicon — and at the edge, that silicon has to be extraordinarily power-efficient. Neuromorphic architectures approach this differently from conventional processors. Through the Innatera partnership we work with real neuromorphic hardware, not simulations of it.
  • Innatera Pulsar — neuromorphic processor for ultra-low-power edge inference
  • Edge AI systems — EVK kits, institutional lab bundles, hands-on hardware programmes
  • Neuromorphic curriculum — spiking architectures and event-driven computation
  • Silicon design for AI workloads — accelerator and datapath design principles
Innatera & Neuromorphic →
What We Have Achieved

Seventeen years of things that were
supposed to be impossible.

Not claims. Outcomes with names, dates and silicon attached.

🏆 Industry First
The first private training institute in India to tape out real silicon.
Nine students — every one from a Tier-2 or Tier-3 college, none with prior tapeout experience — designed a Mini Processor and fabricated it on GlobalFoundries GF180nm in three and a half months. Recognised by Synopsys at SNUG India. Until this, silicon tapeouts in India happened at IITs or inside semiconductor companies. Nowhere else.
9
Students
3.5
Months
GF180
nm Node
1st
In India
Read the full story →
Partnership
Synopsys Workforce Development Partner
Since 2022, every student gets unlimited individual 24×7 access to the full production EDA suite — IC Compiler II, PrimeTime, VCS, Verdi, Design Compiler, StarRC, IC Validator. Not shared tokens. Not a trial. We never calculated whether it was profitable; we calculated whether it helped.
The Synopsys partnership →
Placement
750+ engineers placed across 60+ companies
Alumni now work at Synopsys, Intel, Qualcomm, Cadence, KeenSemi, Mirafra and dozens more. We don't forward resumes — students clear written assessments, projects and mock interviews before we recommend them. That is why a recommendation from us carries weight.
Where our alumni work →
Institutions
IITs, NITs, BITS and 50+ institutions
Active engagements across IIT Guwahati, IIT Bombay, IIT Delhi, IIT Roorkee, IIT Jammu, BITS Pilani Goa, NIT Sikkim and dozens of engineering colleges — plus 22+ signed MoUs. The first IIT workshop was delivered in 2020.
Academic partnerships →
Government
EDA training for DRDO, ISRO and CDAC
Delivered Synopsys tool training to DRDO SAG Delhi, DRDO SAC Ahmedabad (ISRO) and CDAC under the Chips to Startup programme — supporting India's strategic semiconductor capability at defence-grade standards.
Government programmes →
The Journey

From a free blog to a
semiconductor intelligence company.

No funding round. No overnight scale. Seventeen years of compounding, one cohort at a time.

2008
A free blog
vlsi-expert.com begins as a free technical resource for chip design engineers — written by a working engineer, for engineers who had nowhere else to ask.
2010 – 2014
The brand takes shape
"VLSI EXPERT" is born. A YouTube channel follows, then a Kindle book — building an audience years before there was anything to sell them.
2016
Full-time commitment
Puneet leaves a stable corporate career to do this properly. "Mentorship is missing in the VLSI industry. I am ready to talk to anyone, anytime."
2018 – 2019
Incorporated · first center · first institutions
VLSI EXPERT Private Limited is incorporated. The first Bangalore center opens, college engagements begin, and structured placement-oriented programmes launch.
2020 – 2022
IIT workshops · Synopsys WDP · corporate training
First IIT workshop delivered at IIT Guwahati. Synopsys Workforce Development Partner status secured with unlimited 24×7 student tool access. B2B corporate training begins.
2023 – 2025
Multi-center scale & government programmes
Mysuru opens, Bangalore reopens, Online scales nationally. EDA training delivered to DRDO, ISRO and CDAC. 750+ engineers placed. Innatera partnership begins.
2026 — You are here
Silicon, products and new geography
First tapeout by a private training institute in India, recognised by Synopsys at SNUG. Chennai center opens. University LMS goes live. Design services and product lines scale.
How We Work

Six decisions that define us.

Not features. Philosophy — the thinking behind why VLSI EXPERT works the way it does.

01
Foundation first, specialisation later
Most institutes ask "Physical Design or Verification?" on day one. We don't. Students build a common foundation, then choose based on real exposure — not guesswork.
02
A career programme, not a course
We don't sell hours or modules. We structure a journey — foundation, skills, projects, mock interviews, placement, and career guidance long beyond that.
03
Recommendation, not resume-forwarding
Students clear written assessments, projects and mock interviews before we recommend them to a company — so that our recommendation actually means something.
04
A relationship, not a transaction
Placement isn't the end. Internship not converted? Career advice two years later? Want to switch companies? Students come back — and we're still here.
05
Student care, not student count
Small batches of 25–30. Medical insurance. Accidental insurance. Personal mentorship. We see students as people first and placement numbers second.
06
We teach "why", not just "how"
A tool places a standard cell in a site row. Most institutes teach you to click the button. We ask: what is a site row? Why there? What if the placement is wrong?
The People
Built by practitioners who have shipped silicon — not by education entrepreneurs.
A founding team with seventeen years inside Synopsys, Cadence, Magma and LSI Logic. Technical leaders who run production flows. An advisory board of practising semiconductor engineers and an academic council spanning IITs and research institutions. Plus visiting experts from leading chip companies who teach masterclasses and review our curriculum.
Meet the Full Team Founder's Story
Puneet Mittal
Niti Gupta
Dr. Kanika Nagpal
Vyom Sharma
Shalini Rathi
+20
Students · Companies · Institutions · Partners
Wherever you're starting from,
there's a way in.
An engineer building a career. A college building a lab. A company that needs talent, design capability or a silicon programme. An investor looking at India's semiconductor decade. There is a gap somewhere on this arc that we can close for you.
Get in Touch Explore Training Meet the Team